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Front panel design express for windows
Tipologia: Resumos
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February 2005 Version 1. Order Number A29286-
Revision Revision History Date 1.3 Updated:
February 2005
1.2 Updated:
July 2004
1.1 Updated:
December 2002
1.0 Initial release. October 2000
v
This guide describes connection and mechanical recommendations for all main boards having internal connectors requiring external connection. Recommendations include (among others): front panel I/O header pin-out definition, chassis I/O aperture size, I/O interface board dimensions and motherboard to front panel board I/O cable shielding and size. Front panel I/O legacy connectors, internal legacy and legacy-free connectors are also addressed. Specific to front panel I/O the goal is for any particular setup of main board, interface board, interface cable and chassis that meets the pinout and physical dimension recommendations of this design guide will be physically compatible with another setup that also meets the requirements of this design guide. Environmental and electrical compatibility testing should be conducted for all designs arising from use of this design guide.
The guide is intended to provide detailed, technical information to vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences.
Chapter Description 1 Supporting Documentation 2 Front Panel Legacy I/O 3 Front Panel High Speed Serial Bus 4 Cabling Design Guidelines 5 Interface Board Design Guidelines 6 Chassis and I/O Shield Guidelines 7 Internal Legacy Connectors (Reference) 8 Internal Legacy-Free Connectors (Reference)
Front Panel I/O Connectivity Design Guide
viii
Front Panel I/O Connectivity Design Guide x
11
1.1 Online Support ............................................................................................................. 11 1.2 Design Specifications................................................................................................... 12 1.3 Recommended Roles of Suppliers............................................................................... 14
Find information about Intel®^ motherboards under “Product” at these World Wide Web sites: http://www.intel.com/design/motherbd http://support.intel.com/support/motherboards/desktop
Find processor data sheets at this World Wide Web site: http://appzone.intel.com/literature/index.asp
Find information about the ICH addressing at this World Wide Web site: http://developer.intel.com/design/chipsets/datashts/
Find information about USB testing and compatibility at this World Wide Web site: http://www.usb.org
Find information about USB 2.0 that can be downloaded from the USB- web site: http://www.usb.org/developers/usb
Find a white paper describing the signal quality compliance testing procedures for USB low speed and full speed signaling at: http://www.usb.org/developers/compliance/
Find a design guide for integrating a discrete USB 2.0 host controller onto a four-layer desktop motherboard at: http://developer.intel.com/technology/usb/techlit.htm
Find information about IEEE 1394 that can be downloaded from the IEEE web site: http://www.IEEE.org
13
Table 1. Specifications and Design Guidelines (continued)
Reference Name
Specification Title
Version, Revision Date, and Ownership
The information is available from… UHCI Universal Host Controller Interface Design Guide
Version 1.1, March 1996, Intel Corporation.
http://developer.intel.com/ design/USB/UHCI11D.htm
Universal Serial Bus Specification
Version 1.1, September 23, 1998, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, and NEC. (This specification is superseded by the USB 2.0 Specification and should only be used for historical reference.)
Search for the information at either: http://www.usb.org/ or http://www.usb.org/ developers/docs/
Universal Serial Bus Specification
Version 2.0, April 27, 2000 Compaq Computer Corporation, Hewlett-Packard* Co., Intel Corporation, Lucent* Technologies, Inc, Microsoft Corporation, NEC, and Philips.
http://www.usb.org/ developers/docs/
USB
USB 2.0 Platform Design Guideline
Version 1.0 See below**
WfM Wired for Management Baseline
Version 2.0, December 18, 1998, Intel Corporation
http://www.intel.com/labs/ manage/wfm/wfmspecs.htm
** The USB 2.0 Platform Design Guideline, Rev. 1.0 provides guidelines for integrating a discrete USB 2.0 host controller onto a four-layer desktop motherboard. The material covered can be separated into three main categories:
Front Panel I/O Connectivity Design Guide
14
The chassis supplier should provide the front panel I/O board support structure and attachment screws. Screws may not be necessary if a support structure implementing an I/O board with the “snap-in” feature is used. A filler panel (or panels) to close-up the opening in the chassis and bezel should also be provided in the event that the front panel I/O board feature is not used by a particular customer.
The motherboard manufacturer or chassis supplier should provide the interface board and the following items:
A generic interface board provided by a third-party vendor may not function correctly with a particular motherboard. If a third-party supplier’s interface board is to be used, the motherboard manufacturer should conduct testing to ensure the motherboard’s compatibility.
Front Panel I/O Connectivity Design Guide
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Connecting pins 1 and 3 to a front panel mounted LED provides visual indication that data is being read from or written to the hard drive. For the LED to function properly, an IDE drive should be connected to the onboard IDE interface. The LED will also show activity for devices connected to the SCSI (hard drive activity LED) connector.
Connecting pins 2 and 4 to a single- or dual-color, front panel mounted LED provides power on/off, sleep, and message waiting indication. Table 2 shows the possible states for a single-color LED. Table 3 shows the possible states for a dual-color LED.
Supporting the reset function requires connecting pins 5 and 7 to a momentary-contact switch that is normally open. When the switch is closed, the board resets and runs POST.
Supporting the power on/off function requires connecting pins 6 and 8 to a momentary-contact switch that is normally open. The switch should maintain contact for at least 50 ms to signal the power supply to switch on or off. The time requirement is due to internal debounce circuitry. After receiving a power on/off signal, at least two seconds elapses before the power supply recognizes another on/off signal.
Table 2. States for a Single-Color Power LED
LED State Description ACPI State Off Sleeping or power off (not running) S1, S3, S Steady Green Running S Blinking Green Running/message waiting S
Table 3. States for a Dual-Color Power LED
LED State Description ACPI State Off Power off S Steady Green Running S Blinking Green Running/message waiting S Steady Yellow Sleeping S1, S Blinking Yellow Sleeping/message waiting S1, S
To use the message waiting function, ACPI should be enabled in the operating system and a message-capturing application should be invoked.
Front Panel Legacy I/O
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Serial Port B can be configured to support an IrDA module connected to pins 1, 2, 3, 5, and 6 of the 2x3-pin header connector.
OM
2
1 2
1 10
9 6
5
B C
E D
A (^5 1 )
6 2
1
10 2
Header Description Item Pins Description
Manufacturer's Part Number Note IR Front Panel Header (see Table 4)
A 1, 2, 3, 5, and 6
Infrared port Wieson Electronic 2100C888- B 5 and 7 Reset switch C 1 and 3 Hard drive activity LED D 2 and 4 Power / Sleep / Message waiting LED
Switch/LED Front Panel Header (see Table 5)
E 6 and 8 Power switch
Wieson Electronic 2100C888-
Note: Or equivalent.
Figure 1. Front Panel Switch/LED and IR Headers (Top View)
Front Panel Legacy I/O
19
The design options described below support standard front panel microphone and headphone usage (for Standard AC’97 implementation) and also support new dynamic front panel jack detection and re-tasking usage models (for Intel®^ High Definition Audio).
The front panel audio connector is designed to support stereo audio output (headphone or amplified speakers) and a microphone input. Designs using Intel®^ High Definition Audio (Intel®^ HD Audio) permit the two front panel jacks to be dynamically reconfigured as input or outputs, depending upon the desired application.
Front panel audio design in conjunction with motherboard audio header design is dependant upon the type of audio CODEC being used on the motherboard. In the past, AC’97 Integrated Audio CODECs were prevalent. With the introduction of Intel High Definition Audio, many new motherboard designs are switching over to High Definition (HD) audio CODECs. Designers should note that AC’97 and Intel High Definition Audio front panel motherboards and I/O cards implementations are different and may not be directly compatible or interchangeable
It is strongly recommended that motherboard designers only use Intel ®^ HD Audio analog front panel dongles with the Intel ®^ HD Audio analog front panel header to insure that the jack detection and dynamic re-tasking capability is preserved. Passive AC’97 analog front panel dongles (ones which leave the 5V Analog pin-7 line unconnected on the dongle) may be used with the Intel ®^ HD Audio analog front panel header. But note that the front panel jack detection and re-tasking functionality will be lost as the AC’97 jacks cannot support connection to the SENSE line. In addition, software must be aware that an AC’97 dongle is being used with an Intel ®^ HD Audio analog header since the software might need to dedicate codec ports that are connected to the header to meet the product’s intended functionality.
A standard AC’97 front panel audio dongle schematic is shown in Figure 2. The two front panel audio outputs (FP_OUT_L and FP_OUT_R) send and the two front panel audio returns (FP_RETURN_L and FP_RETURN_R) connect to a switching-type, 3.5 mm (1/8-inch) ring-tip- sleeve mini-phone jack mounted on the front panel. The signal path is such that the motherboard CODEC or output amplifier feeds the front panel jacks via FP_RETURN_L and FP_RETURN_R. When the front panel jack is not in use, these signals pass through the front panel jack shunt springs to the back panel jack via the signals FP_RETURN_L and FP_RETURN_R. When headphones are
Front Panel I/O Connectivity Design Guide
20
plugged into the front panel jack, these return signals which feed that back panel jack are disconnected, thus muting the back panel output.
Note that the motherboard should not leave the back panel signal floating when front panel devices are connected. Permitting the back panel signals to float could result in excessive noise at the back panel jack when the front panel jack is in use.
The motherboard designer should put weak pull-down resistors (10 k , for example) on the FP_RETURN_R and FP_RETURN_L lines. If using a single supply for the output amplifier, ensure that these resistors are located after the output capacitor to avoid loading down the amplifier bias. The grounded side of these pulldowns should be connected to analog ground to prevent digital noise from entering the audio sub-system.
MIC (^) AUD_GND
AC’97 Front Panel Dongle Schematic
JACK2 R JACK2 L
1 2
3 4
5 6
7
9 10
JACK1 L
MIC BIAS
FP_OUT_R
FP_OUT_L
FP_RETURN_R
FP_RETURN_L
AUD_5V
MIC Jack
Headphone Jack JACK1 L
Normally close shunt springs makecontact with the signal path and cannot be used for Jack detection.
2X5 Stake Pin Header (100mil Pitch)
**** Note:** ZL should be 600Ω or greater @ 100MHz with a low Q (broad Impedance curve over frequency)
EMI Filter ZL 220pF 220pF**
**ZL****
**ZL****
**ZL****
220pF 220pF
AUD_GND
Figure 2. AC’97 Front Panel Dongle Schematic