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Traffic Light Control-Verilog HDL-Assignment, Exercises of Verilog and VHDL

This assignment was given by Sir Hirak Sahil for Verilog HDL course at Allahabad University. It includes: Traffic, Light, Controller, Procedure, FPGA, Kit, Description, LED, Formalize, States, Light, Patterns

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Project Problem Statement
Project Deadline is 01-06-2012.
This project will carry 15% weight towards your final lab grades.
Traffic Light Controller
In this project you will implement a traffic light controller that controls a main road (East west),
a side road (north south) lights. You will be using a finite state machine to implement this
controller. This involves planning your design, coding, debugging and implementing your design
on FPGA kit.
Procedure
There are two major phases. The first is the design phase, which consists of reading through the
problem, planning, and coming up with a design. The next phase is to implement the first part of
the project using the FPGA. After you verify the traffic light controller's functionality, you can
get checked off. Be ready to demonstrate the project and to present solutions for the problems
asked in the checklist.
Traffic Light Controller Description
The traffic light controller is for an intersection between a Main road and a Side road. Both roads
have a red, yellow, and green signal light.
You will also have to tackle turn left signal as well. So there are 8 signals you have to configure
on 8LED’s available on FPGA kit. First four LED’s are for main road Red, Yellow, Green and
turn left and the other four are for the side road Red, Yellow, Green and turn left. There are two
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Project Problem Statement

Project Deadline is 01-06-2012.

This project will carry 15% weight towards your final lab grades.

Traffic Light Controller

In this project you will implement a traffic light controller that controls a main road (East west),

a side road (north south) lights. You will be using a finite state machine to implement this

controller. This involves planning your design, coding, debugging and implementing your design

on FPGA kit.

Procedure

There are two major phases. The first is the design phase, which consists of reading through the

problem, planning, and coming up with a design. The next phase is to implement the first part of

the project using the FPGA. After you verify the traffic light controller's functionality, you can

get checked off. Be ready to demonstrate the project and to present solutions for the problems

asked in the checklist.

Traffic Light Controller Description

The traffic light controller is for an intersection between a Main road and a Side road. Both roads

have a red, yellow, and green signal light.

You will also have to tackle turn left signal as well. So there are 8 signals you have to configure

on 8LED’s available on FPGA kit. First four LED’s are for main road Red, Yellow, Green and

turn left and the other four are for the side road Red, Yellow, Green and turn left. There are two

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seven segment displays that are used to show the time in seconds that is required for a traffic

signal to light up from red to green or vice-versa and this time should be of 20 seconds for main

road and 10 second for side road. Using the VGA port you will divide the monitor screen and

display the signals colors that are light up on the monitor.

Formalize the problem and decide how many states you need.

Most problems are first specified in a loose verbal form which must be made more rigorous. A

good first step in this direction is to determine the number of states required. Sometime the

determination of the minimum number of states may be very difficult. However, our problem is

simple enough to determine the states easily. Looking at the original specification, we see that

there are six states (light patterns). The turn signals are incorporated in these states as well.

Traffic Light States State North South East West Delay (sec.) 0 Green Red 10 1 Yellow Red 3 2 Red Red 3 3 Red Green 20 4 Red Yellow 3 5 Red Red 3

`

Count < 10

Count < 20

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