Computer Components and Operations Crib Sheet
Powers of 2
21 = 2
28 = 256
215 = 32768
22 = 4
29 = 512
216 = 65536
23 = 8
210 = 1024
217 = 131072
24 = 16
211 = 2048
218 = 262144
25 = 32
212 = 4096
219 = 524288
26 = 64
213 = 8192
220 = 1048576
27 = 128
214 = 16384
Decimal Binary 2’s Complement
57/2 = 28 R 1 -N = 2n – N
28/2 = 14 R 0 -N = [(2n – 1) – N] + 1
14/2 = 7 R 0 e.g.
7/2 = 3 R 1 ((2n - 1) - N) = 0010
3/2 = 1 R 1 -N = ((2n - 1) - N) + 1
1/2 = 0 R 1 -N = 1011
5710 = 1110012 8-bit: [-128, 127]
Hexadecimal Binary
AB5116 = 1010 1011 0101 00012
Binary Addition Bin Subtraction
C + X + Y = Z + C B - X - Y = Z - B
0 + 0 + 0 = 0 + 0 0 - 0 - 0 = 0 - 0
0 + 0 + 1 = 1 + 0 0 - 0 - 1 = 1 - 1
0 + 1 + 0 = 1 + 0 0 - 1 - 0 = 1 - 0
0 + 1 + 1 = 0 + 1 0 - 1 - 1 = 0 - 0
1 + 0 + 0 = 1 + 0 1 - 0 - 0 = 1 - 1
1 + 0 + 1 = 0 + 1 1 - 0 - 1 = 0 - 1
1 + 1 + 0 = 0 + 1 1 - 1 - 0 = 0 - 0
1 + 1 + 1 = 1 + 1 1 - 1 - 1 = 1 - 1
Dual
F*(X,Y,0,1,+,∙) = F(X,Y,1,0,∙,+)
Replace AND by OR
Replace OR by AND
Replace 0 by 1
Replace 1 by 0
Literals are left unchanged
Boolean Laws
1) X + 0 = X 1’) X ∙ 1 = X
2) X + 1 = 1 2’) X ∙ 0 = 0
3) X + X = X 3’) X ∙ X = X
4) (X’)’ = X
5) X + X’ = 1 5’) X ∙ X’ = 0
6) X + Y = Y + X 6’) X ∙ Y = Y ∙ X
7) (X + Y) + Z = X + (Y + Z)
7’) (X ∙ Y) ∙ Z = X ∙ (Y ∙ Z)
8) X ∙ (Y + Z) = (X ∙ Y) + (X ∙ Z)
8’) X + (Y ∙ Z) = (X + Y) ∙ (X + Z)
9) X + (X ∙ Y) = X 9’) X ∙ (X + Y) = X
10) (X ∙ Y) + (X ∙ Y’) = X
10’) (X + Y) ∙ (X + Y’) = X
11) (X + Y’) ∙ Y = X ∙ Y
11’) (X ∙ Y’) + Y = X + Y
12) (X1 + X2 + … + Xn)’ = X1’ ∙ X2’ ∙ … ∙ Xn’
12’) (X1 ∙ X2 ∙ … ∙ Xn)’ = X1’ + X2’ + … + Xn’
13) {F(X1,X2,…,Xn,0,1,+,∙)}’ =
{F(X1’,X2’,…,Xn’,1,0, ∙,+)}
14) (X + Y) ∙ (X’ + Z) = (X ∙ Z) + (X’ ∙ Y)
14’) (X ∙ Y) + (X’ ∙ Z) = (X + Z) ∙ (X’ + Y)
15) (X ∙ Y) + (Y ∙ Z) + (X’ ∙ Z) = (X ∙ Y) + (X’ ∙ Z)
15’) (X + Y) ∙ (Y + Z) ∙ (X’ + Z) = (X + Y) ∙ (X’ + Z)
Minterms and Maxterms
Row
X
Y
Z
Minterm
Maxterm
0
0
0
0
X’∙Y’∙Z’
X+Y+Z
1
0
0
1
X’∙Y’∙Z
X+Y+Z’
2
0
1
0
X’∙Y∙Z’
X+Y’+Z
3
0
1
1
X’∙Y∙Z
X+Y’+Z’
4
1
0
0
X∙Y’∙Z’
X’+Y+Z
5
1
0
1
X∙Y’∙Z
X’+Y+Z’
6
1
1
0
X∙Y∙Z’
X’+Y’+Z
7
1
1
1
X∙Y∙Z
X’+Y’+Z’
Minterm = 1
Maxterm = 0
Karnaugh Maps
B
00
01
11
10
00
M0
M4
M12
M8
01
M1
M5
M13
M9
D
C
11
M3
M7
M15
M11
10
M2
M6
M14
M10
A
Parity Codes
Odd Parity add 0 or 1 to data bits so total #
of 1s is ODD
Even Parity add 0 or 1 to data bits so total #
of 1s is EVEN
Hamming Codes
Hamming distance d = # of 1s in XOR of
two codewords
Code word b4b3b2b1
Message b4b3b2x4b1x2x1
X1 checks bits b4b2b1 for EVEN parity
X2 checks bits b4b3b1 for EVEN parity
X3 checks bits b4b3b2 for EVEN parity
Syndrome S4S2S1 = bit # of error
S1 checks bits b4b2b1x1 for EVEN parity
S2 checks bits b4b2b1x2 for EVEN parity
S4 checks bits b4b3b2x4 for EVEN parity
Quine-McCluskey Algorithm
F(A,B,C,D) = ΣA,B,C,D (1,2,3,4,5,7,9,15)
Dec
Bin
Dec
Bin
Dec/Bin
1
0001*
1,3
00X1*
1,3,5,7
2
0010*
1,5
0X01*
0XX1
4
0100*
1,9
X001
3
0011*
2,3
001X
5
0101*
4,5
010X
9
1001*
3,7
0X11*
7
0111*
5,7
01X1*
15
1111*
7,15
X111
1
2
3
4
5
7
9
15
0XX1
P
P
P
P
X001
P
<-
--
--
--
--
P
001X
|
P
P
|
|
010X
|
|
P
P
|
X111
|
|
|
P
<
P
F = B’∙C’∙D’ + A’∙B’∙C + A’∙B∙C’ + B∙C∙D.
CMOS
NMOS PMOS
drain so urce
gate gate
source drain
H = on = short circuit L = on = short circuit
L = off = open circuit H = off = open circuit
Inverter NAND
NOR
Espresso
Input file:
#comment
.i 3 # no. of input variables
.o 3 # no. of output variables
000 001 # truth table
001 010
010 011
011 100
100 000
101 ---
110 ---
111 ---
Command line:
C:\>espresso input.txt
Output:
##comment
.i 3 # no. of input variables
.o 3 # no. of output variables
.p 4 # no. of rows (optional)
0-0 001 # bo
-11 100 # b2
-01 010 # b1
-10 010 # b1
.e # end of output
Expressions:
b2 = a1a0
b1 = a1’a0 + a1a0’
b0 = a2’a0’
Vin Vout
Vcc
0
Q2
Q1
Vcc
0
Q2
Q3
Q1
Z
Q4
B
A
Vcc
0
Q1
Q2 Q4
Q3
Z
A
B
