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Midterm Exam Questions, Exams of Computer Architecture and Organization

Questions for a midtermn exam paper with solutions. This covers a whole lot of important questions in computer architecture

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ECOM 3310
Computer Architecture, Design and Organization
Midterm Exam
Spring 06-07
9.Apr.2006
Duration: 60 minutes
ECE Department
Faculty of Engineering
IUG
Dr. M. Mikki
Eng. Said Marouf
Question 1)
a) Translate the following C code into MIPS. Please comment your code.
Assume x is $s0; y is $s1; A is $a0 and points to integers; B is $a1 and points to
unsigned char.
You will lose points for assembler syntax errors.
1) x = (y > 7)? x + 2 : x – 3;
addi $t0, $zero, 7
slt $t1, $t0, $s1 # if ((3 < y )== 0) goto L1
beq $t1, $zero, L1
addi $s0, $s0, 2 # then
j L2
L1: addi $s0, $s0, –3 # else
L2:
2) x = (x + (y + 5)) & 0xFF;
addi $t0, $s1, 5
add $t0, $s0, $t1
andi $s0, $t0, 0xFF
3) A[x+3] = B[x+2] | 0x10
addi $t0,$s0,2 # x + 2
add $t1,$a1,$t0 # (B + x + 2)
lbu $t2,0($t1) # = *(B + x + 2)
ori $t3,$t2,0x10
addi $t4,$s0,3 # x+3
add $t5,$t4,$t4 # 2*(x+3)
add $t6,$t5,$t5 # 4*(x+3)
add $t7,$a0,$t6 # A + x + 3
sw $t3,0($t7) # *(A+x+3) = $t3
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ECOM 3310 Computer Architecture, Design and Organization Midterm Exam Spring 06- 9.Apr. Duration: 60 minutes

ECE Department Faculty of Engineering IUG

Dr. M. Mikki Eng. Said Marouf

Question 1) a) Translate the following C code into MIPS. Please comment your code. Assume x is $s0; y is $s1; A is $a0 and points to integers; B is $a1 and points to unsigned char. You will lose points for assembler syntax errors.

  1. x = (y > 7)? x + 2 : x – 3;

addi $t0, $zero, 7 slt $t1, $t0, $s1 # if ((3 < y )== 0) goto L beq $t1, $zero, L addi $s0, $s0, 2 # then j L L1: addi $s0, $s0, –3 # else L2:

  1. x = (x + (y + 5)) & 0xFF;

addi $t0, $s1, 5 add $t0, $s0, $t andi $s0, $t0, 0xFF

  1. A[x+3] = B[x+2] | 0x

addi $t0,$s0,2 # x + 2 add $t1,$a1,$t0 # (B + x + 2) lbu $t2,0($t1) # = (B + x + 2) ori $t3,$t2,0x addi $t4,$s0,3 # x+ add $t5,$t4,$t4 # 2(x+3) add $t6,$t5,$t5 # 4(x+3) add $t7,$a0,$t6 # A + x + 3 sw $t3,0($t7) # (A+x+3) = $t

b) MIPS has several addressing modes, list all types of these addressing modes.

Question 2) a) Write a procedure, bfind, in MIPS assembly language. The procedure should take a single argument that is a pointer to a null-terminated string in register $a0. The bfind procedure should locate the first b character in the string and return its address in register $v0. If there are no b’s in the string, then bfind should return a pointer to the null character at the end of the string. For example, if the argument to bfind points to the string “rabbit”, then the return value will be a pointer to the third character of the string.

.data string: .asciiz "hello" .text .globl main

main: la $a0,string jal bfind

move $a0,$v li $v0, syscall

li $v0, syscall

b) How can you modify the answer of part a, so the program will count the number of b characters in the string, and store their corresponding addresses into an array. (Show modifications, or rewrite the program)

Question 3) The following program tries to copy words from the address in register $a0 to the address in register $a1, counting the number of words copied in register $v0. The program stops copying when it finds a word equal to 0. You do not have to preserve the

main: la $a0,string jal bfind .data string : .asciiz "hello" string2: .asciiz "Find me\n"

a) After executing the instruction la $a0, string2 the value of $a0 = _____________. b) After executing the instruction jal bfind the value of $ra = _____________. c) The program starts at address _____________. d) string is loaded to address _____________, where string2 is loaded to address _____________. e) (^) Explain why PCSPIM translated li $v0,1 to ori $2, $0, $2 , and how both instructions are the same.

f) Explain what each part of a text segment line means.

Question 5) As you know, a decoder is a device that has n inputs, 2n^ outputs and, if the value represented by the input lines is k, then the kth^ output line is asserted. Build using logic gates a device, similar to a decoder, that has 2 inputs (in0 and in1) and 4 outputs (out

  • out3) and when the value of the input lines is k, all the lines of the output numbered 0 through K are asserted (i.e. set to 1). For example, if the value of the input lines is 2, then output lines 0, 1, and 2 would be asserted.

Question 5) Modify the 1-bit ALU covered in class (supporting AND, OR, +, and -) to implement an XOR (exclusive OR) operation. Draw the entire ALU, adding the fewest possible gates. Use the available op code 11 to select the XOR operation. (NOTE: you have to construct the solution without using an XOR gate).

Good Luck

1. What happens if an operation creates a number that can not be represented in a specified format? (One word)

Ans: Overflow or underflow or exception (accept any one of the 3)

2. Below is a circuit that adds two 4-bit twos-complement numbers, A and B to produce a 4-bit twos complement result S. To the circuit below, add the additional circuitry to detect overflow and label the output OVF.

Ans:

Question 4

Suppose that you have already written a MIPS function with the following signature:

int sum(int A[], int first, int last).

This function calculates the sum of the elements of A starting with element first and ending with element last. Write a fragment of MIPS assembly language which calls

this function and uses it to calculate the average of all values in A. You may assume that the size of the array A is N.

Ans: la $a0, A # First parameter is address of array element 0 lw $a1, $zero # Second parameter: index of elem at low end of range lw $a2, N # Third parameter: index of last elem to sum addi $a2, $a2, -1 # N was size: index of last element is N- jal sum # Call the sum function move $t0, $v0 # Save the return value in $t lw $t1, N # Load size of array into $t div $t2, $t0, $t1 # This form of div is provided as a pseudoinstruction.

  1. The pseudoinstruction la rd, imm (load address) is assembled into a lui (load upper immediate) instruction followed by an ori (or immediate) instruction.
  2. Why are two instructions necessary

Address constants are usually larger than 16 bits, so you need to load a 32-bit constant.

  1. Why does the lui instruction precede the ori instruction?

You want to set both halves of the word, and lui zeroes the lower half, thus undoing your work. Ori lets the top half of the word alone, so you can set first top, then bottom.

  1. Why can’t an addi be used in place of the ori?

addi causes sign extension, and give the wrong result if its argument is negative.

  1. Assume a move rs, imm pseudoinstruction exists. It is similar but not identical to the la instruction. Explain the difference between it and the la.

la – load effective address loads an address, which the assembler calculates at assemble time (not run) by looking at its symbol table (determined by the .data segment of the program). The move or li is the same except it uses the numerical value of the constant rather than the looked-up value.

Part (a) (2 marks) Suppose in a MIPS processor that $s0 contains 0xb000_0000, $s contains 0x9a00_0000 and that the instruction addu $s2, $s0, $s is executed. What bit pattern does the instruction leave in $s1? (To get full marks you must show how you obtained your answer.) Part b. (3 marks) Briefly define the term overflow as it is applied to integer addition. Did overflow occur in the instruction of part (a)? Show how you decided whether overflow occurred. Part c. (3 marks) Briefly define the term wraparound as it is applied to integer addition. Did wraparound occur in the instruction of part (a)? Show how you decided whether wraparound occurred.

bfind: loop: lb $t0,($a0) beq $t0,98,find beq $t0,$zero,nullisfound add $a0,$a0, b loop find: move $v0,$a b end nullisfound: move $v0,$a

end: jr $ra

A

B

C

C

A

B

S

C

C

A

B

S

C

C

A

B

S

C

C

FA

FA

FA

FA