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Le-Ment College of Advanced Studies-Pattambi
University of Calicut
B.Sc Computer Science (CUCBCSS) - (2019 admission onwards) Fourth semester COMMON COURSE
A14 - Microprocessors-Architecture and Programming
Pradeep C P ( M.Sc,,M.Phil ) Assistant professor (Electronics) Le-Ment College Of Advanced Studies. (Affiliated to Calicut University) Pattambi Palakkad
UNIT-1: General Architecture of computer:
Block Diagram of a Microcomputer:
A microcomputer is a complete computer on a small scale,
designed for use by one person at a time. An antiquated term, a
microcomputer is now primarily called a personal computer (PC), or a
device based on a single-chip microprocessor. Common microcomputers
include laptops and desktops. Beyond standard PCs, microcomputers also
include some calculators, mobile phones, notebooks, workstations and
embedded systems.
Smaller than a mainframe or minicomputer, a microcomputer uses
a single integrated semiconductor chip for its central processing unit
(CPU). They also contain memory in the form of read-only memory
(ROM) and random access memory (RAM), input/output (I/O) ports, and a
bus or system of interconnecting wires, all housed in a single unit usually
referred to as a motherboard.
Common I/O devices include keyboards, monitors, printers and external
storage.
The term microcomputer dates back to the 1970s. The advent of the
Intel 4004 microprocessor in 1971, and later the Intel 8008 and Intel 8080
microprocessor in 1972 and 1974 respectively, paved the path to the
creation of the microcomputer.
By the 1980s, microcomputers were being used for more than
games and computer-based recreation, finding widespread use in personal
computing, workstations and academia. By the 1990s, microcomputers
were being produced as pocket-sized personal digital assistants (PDAs),
and later came in the form of cell phones and portable music players.
Microcomputer applications
Personal microcomputers are often used for education and
entertainment. Beyond laptops and desktops, microcomputers can include
video game consoles, computerized electronics and smartphones.
In the workplace, microcomputers have been used for applications
including data and word processing, electronic spread sheets, professional
presentation and graphics programs, communications and database
management systems. They have been used in business for tasks such as
bookkeeping, inventory and communication; in medical settings to record
and recall patient data, manage healthcare plans, complete schedule and
for data processing; in financial institutions to record transactions, track
billing, prepare financial statements and payrolls, and auditing; and in
military applications for training devices, among other uses.
Introduction to microprocessor.
Microprocessor is a type of miniature digital electronic device that
contains the arithmetic, logic, and control circuitry necessary to perform
the functions of a digital computer’s central processing unit. In effect, this
kind of integrated circuit can interpret and execute program instructions as
well as handle arithmetic and logical operations.
How does a Microprocessor Work?
The microprocessor follows a sequence: Fetch, Decode, and then
Execute.
Initially, the instructions are stored in the memory in a sequential
order. The microprocessor fetches those instructions from the memory,
then decodes it and executes those instructions till STOP instruction is
reached. Later, it sends the result in binary to the output port. Between
these processes, the register stores the temporarily data and ALU performs
the computing functions.
The microprocessor also permitted the development of so-called
intelligent terminals, such as automatic teller machines and point-of-sale
terminals employed in retail stores. The microprocessor also provides
automatic control of industrial robots, surveying instruments, and various
kinds of hospital equipment. It has brought about the computerization of a
wide array of consumer products, including programmable microwave
ovens, television sets, and electronic games. In addition,
some automobiles feature microprocessor-controlled ignition and fuel
systems designed to improve performance and fuel economy.
Architecture of 8085 microprocessor ALU The Arithmetic and Logic Unit , ALU performs the arithmetic and logical operations: Addition Subtraction Logical AND Logical OR Logical EXCLUSIVE OR Complement (Logical NOT) Increment (add 1) Decrement (subtract 1) Left shift, Rotate left, Rotate right Clear, etc. Timing and Control Unit The timing and control unit is the section of the CPU. It is used to generate timing and control signals which are necessary for the execution of instructions. It is used to control data flow between CPU and peripherals (including memory). It is used to provide status, control and timing signals which are required for the operation of memory and I/O devices. It is used to control the entire operations of the microprocessor and peripherals connected to it. Thus we can see that the control unit of the CPU acts as the brain of the computer system.
Register organization Registers are used for temporary storage and manipulation of data and instructions by the microprocessor. Data remain in the registers till they are sent to the I/O devices or memory. Intel 8085 microprocessor has the following registers: One 8-bit accumulator (ACC) i.e. register A Six general purpose registers of 8-bit, these are B,C, D, E, H and L One 16-bit stack pointer, SP One 16-bit Program Counter, PC Instruction register Temporary register In addition to the above mentioned registers the 8085 microprocessor contains a set of five flip-flops which serve as flags (or status flags). A flag is a flip-flop which indicates some conditions which arises after the execution of an arithmetic or logical instruction. Accumulator (ACC): The accumulator is an 8-bit register associated with the ALU. The register 'A' is an accumulator in the 8085. It is used to hold one of the operands of an arithmetic and logical operation. The final result of an arithmetic or logical operation is also placed in the accumulator. General-Purpose Registers: The 8085 microprocessor contains six 8-bit general purpose registers. They are: B, D, C, E, H and L register. To hold data of 16-bit a combination of two 8-bit registers can be employed. The combination of two 8-bit registers is called register pair. The valid register pairs in the 8085 are: D-E, B-C and H-L. The H-L pair is used to act as a memory pointer. Program Counter (PC): It is a 16-bit special purpose register. It is used to hold the address of memory of the next instruction to be executed. It keeps the track of the instruction in a program while they are being executed. The microprocessor increments the content of the next program counter during the execution of an instruction so that at the end of the execution of an instruction it points to the next instructions address in the program. Stack Pointer (SP): It is a 16-bit special function register used as memory pointer. A stack is nothing but a portion of RAM. In the stack, the contents of only those registers are saved, which are needed in the later part of the program. The stack pointer (SP) controls the addressing of the stack. The Stack Pointer contains the address of the top element of data stored in the stack. Instruction Register: The instruction register holds the opcode (operation code or instruction code) of the instruction which is being decoded and executed.
Control bus : which is used to generate timing and control signals to control all the associated peripherals, microprocessor uses control bus to process data that is what to do with selected memory location. Some control signals are: Memory read Memory write I/O read I/O Write Op-code fetch 8085 - Pin Configuration Address Bus and Data Bus A8 to A15 (Output): These are address bus and are used for the most significant bits of the memory address or 8-bits of I/O address. AD0 to AD7 (Input/output): These are time multiplexed address/data bus i.e. they serve dual purpose. They are used for the least significant 8 bits of the memory address or I/O address during the first cycle. Again they are used for data during 2nd and 3rd clock cycles. Control and Status Signals ALE (Output): ALE stands for Address Latch Enable signal. ALE goes high during first clock cycle of a machine cycle and enables the lower 8-bits of the address to be latched either into the memory or external latch. IO/M (Output): It is a status signal which distinguishes whether the address is for memory or I/O device. S0, S1 (Output): These are status signals sent by the microprocessors to distinguish the various types of operation given in table below: RD (Output): RD is a signal to control READ operation. When it goes low, the selected I/O device or memory is read. WR (Output): WR is a signal to control WRITE operation. When it goes low, the data bus' data is written into the selected memory or I/O location. READY (Input): It is used by the microprocessor to sense whether a peripheral is ready to transfer a data or not. If READY is high, the peripheral is ready. If it is low the microprocessor waits till it goes high. Interrupts and Externally Initiated Signals HOLD (INPUT): HOLD indicates that another device is requesting for the use of the address and data bus.
HLDA (OUTPUT): HLDA is a signal for HOLD acknowledgement which indicates that the HOLD request has been received. After the removal of this request the HLDA goes low. INTR (Input): INTR is an Interrupt Request Signal. Among interrupts it has the lowest priority. The INTR is enabled or disabled by software. INTA (Output): INTA is an interrupt acknowledgement sent by the microprocessor after INTR is received. RST 5.5, 6.5, 7.5 and TRAP (Inputs): These all are interrupts. When any interrupt is recognized the next instruction is executed from a fixed location in the memory as given below: RST 7.5, RST 6.5 and RST 5.5 are the restart interrupts which cause an internal restart to be automatically inserted. The TRAP (non maskable interrupt) has the highest priority among interrupts. The order of priority of interrupts is as follows:
- TRAP (Highest priority)
- RST 7.
- RST 6.
- RST 5.
- INTR (Lowest priority). Reset Signals RESET IN (Input): It resets the program counter (PC) to 0. It also resets interrupt enable and HLDA flip-flops. The CPU is held in reset condition till RESET is not applied. RESET OUT (Output): RESET OUT indicates that the CPU is being reset. Clock Signals X1, X2 (Input): X1 and X2 are terminals to be connected to an external crystal oscillator which drives an internal circuitry of the microprocessor. It is used to produce a suitable clock for the operation of microprocessor. CLK (Output): CLK is a clock output for user, which can be used for other digital ICs. Its frequency is same at which processor operates. Serial I/O Signals SID (Input): SID is data line for serial input. The data on this line is loaded into the seventh bit of the accumulator when RIM instruction is executed. SOD (Output): SOD is a data line for serial output. The seventh bit of the accumulator is output on SOD line when SIM instruction is executed.
▪ Between a register and a memory location. ▪ A data byte can be transferred between a register and a memory location. ▪ Between an I/O device and the accumulator. ▪ Between a register pair and the stack. It is very important to clear your concept that the term ‘data transfer’ is a misnomer—actually data is not transferred, but copied from source to destination. Examples: MOV A,B MVI A, 05 LXI H,C Arithmetic group: As name suggest that instructions in this group are used for arithmetic operation. The arithmetic operations possible are addition, subtraction, increment and decrement. Example: ADD B; SUB C; INR C; DCR C. Logical group: Instructions in this group is used to do the logical operation. The logical operations include AND, OR, EXOR, compare, complement. Example: ANI 05; CMP B. Shift and Rotate Instructions Shift instructions: Shift instructions can perform two basic types of shift operations; the logical shift and the arithmetic shift. Also, each of these operations can be performed to the right or to the left. Example: SHL, SHR, SAL, and, SAR instructions: Branching/Jump instruction group: In 8085 microprocessor branch operations are Jump, Call, Return and Restart instructions. Example: JMP C050; CALL D050; RET. The Jump instruction, which can transfer program control to a certain memory location. These jump instructions can be divided into two categories Unconditional jump instructions (Ex:- JMP) Conditional jump instructions (Ex :- JNZ, JZ) Machine control group: This instructions are used to control the operation of 8085 microprocessor. The machine control operations are Halt, Interrupt and NOP (no operation). Example: HLT; NOP. Instruction Cycle The time required to fetch an instruction and necessary data from memory and to execute it, is called an instruction cycle. Or the total time required to execute an instruction is given by: IC = FC + EC Where, IC = Instruction Cycle FC = Fetch Cycle EC = Execute Cycle
Addressing modes in 8085 microprocessor
The way of specifying data to be operated by an instruction is called addressing mode. Types of addressing modes – In 8085 microprocessor there are 5 types of addressing modes:
- Immediate Addressing Mode – In immediate addressing mode the source operand is always data. If the data is 8-bit, then the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes. Examples: MVI B 45 (move the data 45H immediately to register B) LXI H 3050 (load the H-L pair with the operand 3050H immediately) JMP address (jump to the operand address immediately)
- Register Addressing Mode – In register addressing mode, the data to be operated is available inside the register(s) and register(s) is(are) operands. Therefore the operation is performed within various registers of the microprocessor. Examples: MOV A, B (move the contents of register B to register A) ADD B (add contents of registers A and B and store the result in register A) INR A (increment the contents of register A by one)
- Direct Addressing Mode – In direct addressing mode, the data to be operated is available inside a memory location and that memory location is directly specified as an operand. The operand is directly available in the instruction itself. Examples: LDA 2050 (load the contents of memory location into accumulator A) LHLD address (load contents of 16-bit memory location into H-L register pair) IN 35 (read the data from port whose address is 01)
- Register Indirect Addressing Mode – IN register indirect addressing mode, the data to be operated is available inside a memory location and that memory location is indirectly specified by a register pair. Examples: MOV A, M (move the contents of the memory location pointed by the H-L pair to the accumulator) LDAX B (move contains of B-C register to the accumulator) LXIH 9570 (load immediate the H-L pair with the address of the location 9570) 5. Implied/Implicit Addressing Mode – In implied/implicit addressing mode the operand is hidden and the data to be operated is available in the instruction itself. Examples: CMA (finds and stores the 1’s complement of the contains of accumulator A in A) RRC (rotate accumulator A right by one bit) RLC (rotate accumulator A left by one bit)
Instruction cycle in 8085 microprocessor
Time required to execute and fetch an entire instruction is
called instruction cycle. It consists:
Fetch cycle – The next instruction is fetched by the address stored in
program counter (PC) and then stored in the instruction register.
Decode instruction – Decoder interprets the encoded instruction
from instruction register.
Reading effective address – The address given in instruction is read
from main memory and required data is fetched. The effective
address depends on direct addressing mode or indirect addressing
mode.
Execution cycle – consists memory read (MR), memory write (MW),
input output read (IOR) and input output write (IOW)
2nd and 3rd T states
RD goes low, indicating the initiation of the read operation.
Data is read from the memory location and is loaded into the data
bus AD0-AD7. The data is loaded into the data bus at the
beginning of the 2nd T state and exists until the end of the third T
state.
By the end of the third T state, RD goes high, indicating the end of
the read operation.
PC is incremented by 1 (only in cases described in the note in the
red box above).
Memory write machine cycle
Contents are written to a memory location/stack during a memory write
machine cycle (MWMC). This machine cycle spans over three T states.
Each of these T states are explained here along with the timing diagram.
PC is not incremented in this machine cycle. This is very similar to
MRMC, except a few differences.
1st T state
Higher address bits loaded into A8-A15.
Lower address bits loaded into AD0-AD7.
ALE signal goes high in the beginning to indicate that AD0-AD
contains lower address bits.
IO/M goes low since it is a memory operation.
S1 and S0 become 0 and 1 respectively, indicating MWMC.
ALE goes low by the end of the first T state. Lower address bits are
expected to be latched by this time.
2nd and 3rd T states
WR goes low, indicating the initiation of the write operation.
Data to be written is loaded on the data bus at the beginning of the
second T state and exists until the end of the third T state when the
data is transferred from the data bus to the memory location.
By the end of the third T state, WR goes high, indicating the end of
the write operation. Thus, MWMC comes to an end.
The microprocessor cannot do anything by itself therefore; It needs to be linked with memory, extra peripherals, or IO devices. This linking is called Interfacing. The interfacing of the I/O devices in 8085 can be done in two ways:
1. Memory-Mapped I/O Interfacing : In this kind of interfacing, we assign a memory address that can be used in the same manner as we use a normal memory location. 2. I/O Mapped I/O Interfacing : A kind of interfacing in which we assign an 8-bit address value to the input/output devices which can be accessed using IN and OUT instruction is called I/O Mapped I/O Interfacing. Difference between Memory-Mapped I/O Interfacing and I/O Mapped I/O Interfacing : Features Memory Mapped IO IO Mapped IO Addressing IO devices are accessed like any other memory location. They cannot be accessed like any other memory location. Address Size They are assigned with 16-bit address values. They are assigned with 8-bit address values. Instructions Used The instruction used are LDA and STA, etc. The instruction used is IN and OUT. Cycles Cycles^ involved during operation are Memory Read, Memory Write. Cycles involved during operation are IO read and IO writes in the case of IO Mapped IO. Registers Communicat ing Any register can communicate with the IO device in case of Memory Mapped IO. Only Accumulator can communicate with IO devices in case of IO Mapped IO. Space Involved 216 IO ports are possible to be used for interfacing in case of Memory Mapped IO. Only 256 I/O ports are available for interfacing in case of IO Mapped IO. _IO/Msignal_ During writing or read cycles (IO/M = 0 ) in case of Memory Mapped IO. During writing or read cycles (IO/M` = 1) in case of IO Mapped IO. Control Signal No separate control signal required since we have unified memory space in the case of Memory Mapped IO. Special control signals are used in the case of IO Mapped IO. Arithmetic and Logical operations Arithmetic and logical operations are performed directly on the data in the case of Memory Mapped IO. Arithmetic and logical operations cannot be performed directly on the data in the case of IO Mapped IO.
Using 8-bit register as counter : Counter is another approach to generate a time delay. In this case the program size is smaller. So in this approach we can generate more time delay in less space. The following program will demonstrate the time delay using 8-bit counter.
MVI B, FFH
LOOP: DCR B
JNZ LOOP
RET
Here the first instruction will be executed once, it will take 7 T-states. DCR C instruction takes 4 T-states. This will be executed 255 (FF) times. The JNZ instruction takes 10 T-states when it jumps (It jumps 254 times), otherwise it will take 7 T-States. And the RET instruction takes 10 T-States. 7 + ((4255) + (10254)) + 7 + 10 = 3584. So the time delay will be 3584 * 1/3μs = 1194.66μs. So when we need some small delay, then we can use this technique with some other values in the place of FF. Using 16-bit register-pair as counter : Instead of using 8-bit counter, we can do that kind of task using 16-bit register pair. Using this method more time delay can be generated. This method can be used to get more than 0.5 seconds delay. Let us see and example. LXI B,FFFFH LOOP: DCX B MOV A,B ORA C JNZ LOOP RET In the above table we have placed the T-States. From that table, if we calculate the time delay, it will be like this: 10 + (6 + 4 + 4 + 10) * 65535H – 3 + 10 = 17 + 24 * 65535H = 1572857. So the time delay will be 1572857 * 1/3μs = 0.52428s. Here we are getting nearly 0.5s delay. In different program, we need 1s delay. For that case, this program can be executed twice. We can call the Delay subroutine twice or use another outer loop for two-time execution. Stack in 8085 The stack is a reserved area of the memory in RAM where we can store temporary information. Interestingly, the stack is a shared resource as it can be shared by the microprocessor and the programmer. The programmer can use the stack to store data. And the microprocessor uses the stack to execute subroutines. The 8085 has a 16-bit register known as the ‘Stack Pointer’. This register’s function is to hold the memory address of the stack. This control is given to the programmer. The programmer can decide the starting address of the stack by loading the address into the stack pointer register at the beginning of a program uses the instruction LXI SP. The stack works on the principle of First In Last Out. The memory location of the most recent data entry on the stack is known as the Stack Top. We use two main instructions to control the movement of data into a stack and from a stack. These two instructions are PUSH and POP. PUSH – This is the instruction we use to write information on the stack. POP – This is the instruction we use to read information from the stack.
LXI SP, 8000H
LXI H, 1234H
PUSH H
POP D
HLT
Explanation of the code LXI SP, 8000H – The address of the stack pointer is set to 8000H by loading the number into the stack pointer register. LXI H, 1234H – Next, we add a number to the HL pair. The most significant two bits will enter the H register. The least significant two bits will enter the L register. PUSH H – The PUSH command will push the contents of the H register first to the stack. Then the contents of the L register will be sent to the stack. So the new stack top will hold 34H. POP D – The POP command will remove the contents of the stack and store them to the DE register pair. The top of the stack clears first and enters the E register. The new top of the stack is 12H now. This one clears last and enters the D register. The contents of the DE register pair is now 1234H. HLT – HLT indicates that the program execution needs to stop. On a stack, we can perform two operations. PUSH and POP. In case of PUSH operation, the SP register gets decreased by 2 and new data item used to insert on to the top of the stack. On the other hand, in case of POP operation, the data item will have to be deleted from the top of the stack and the SP register will get increased by the value of 2.
PUSH and POP operation in 8085.
PUSH Rp
PUSH instruction can be explained with an example
LXI SP,2605H
LXI B, 2550H
PUSH B
Delay Counter
POP B
Step 1: LXI SP, 2605 will initialize SP register 2605
Step 2: LXI B, 2550H will initialize or load BC register pair with
2550H data so B = 25 and C = 50.
Step 3: The execution of PUSH b instruction will be The stack
pointer is decreased by one to 2604H and the contents of the B
register are copied to memory location 2604H.
The stack pointer is again decreased by one to 2603H and the
contents of the C register are copied to memory location 2603H.
The contents of the register pair BC are not destroyed. However ,
BC is made available for the delay counter.
The execution of PUSH operation is shown in Figure.
CALL instruction: CALL 4000H (3 byte instruction) – When CALL instruction is fetched, the microprocessor knows that the next two Memory locations contains 16bit subroutine address in the memory. RET instruction: RET (1 byte instruction) – Retrieve the return address from the top of the stack – Load the program counter with the return address.
Interrupts in 8085.
Interrupts are the signals generated by the external devices to request the microprocessor to perform a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. Interrupt is a mechanism by which an I/O or an instruction can suspend the normal execution of processor and get itself serviced. Generally, a particular task is assigned to that interrupt signal. In the microprocessor based system the interrupts are used for data transfer between the peripheral devices and the microprocessor. Interrupt Service Routine (ISR) A small program or a routine that when executed services the corresponding interrupting source is called as an ISR. Maskable /Non-Maskable Interrupt An interrupt that can be disabled by writing some instruction is known as Maskable Interrupt otherwise it is called Non-Maskable Interrupt. There are 6 pins available in 8085 for interrupt:
- TRAP
- RST 7.
- RST6.
- RST5.
- INTR
- INTA When there is an interrupt requests to the Microprocessor then after accepting the interrupts Microprocessor send the INTA (active low) signal to the peripheral. The vectored address of particular interrupt is stored in program counter. The processor executes an interrupt service routine (ISR) addressed in program counter. There are two types of interrupts used in 8085 Microprocessor: Hardware Interrupts Software Interrupts
Software Interrupts
A software interrupts is a particular instructions that can be inserted into the desired location in the program. There are eight Software interrupts in 8085 Microprocessor. From RST0 to RST7. Software Interrupt is invoked by the use of INT instruction. This event immediately stops execution of the program and passes execution over to the INT handler. The INT handler is usually a part of the operating system and determines the action to be taken. It occurs when an application program terminates or requests certain services from the operating system.
1. RST
2. RST
3. RST
4. RST
5. RST
6. RST
7. RST
8. RST
They allow the microprocessor to transfer program control from the main program to the subroutine program. After completing the subroutine program, the program control returns back to the main program. Hardware Interrupt. Hardware Interrupt is caused by some hardware device such as request to start an I/O, a hardware failure or something similar. Hardware interrupts were introduced as a way to avoid wasting the processor’s valuable time in polling loops, waiting for external events. For example, when an I/O operation is completed such as reading some data into the computer from a tape drive. There are 6 interrupt pins in the microprocessor used as Hardware Interrupts given below:
- TRAP
- RST7.
- RST6.
- RST5.
- INTR
TRAP
It is non maskable edge and level triggered interrupt. TRAP has the highest priority and vectors interrupt. Edge and level triggered means that the TRAP must go high and remain high until it is acknowledged. In case of sudden power failure, it executes a ISR and send the data from main memory to backup memory. INTR It is level triggered and maskable interrupt. The following sequence of events occurs when INTR signal goes high:
- The 8085 checks the status of INTR signal during execution of each instruction.
- If INTR signal is high, then 8085 complete its current instruction and sends active low interrupt acknowledge signal, if the interrupt is enabled.
- On receiving the instruction, the 8085 save the address of next instruction on stack and execute received instruction. INTA is not an interrupt. INTA is used by the microprocessor for sending the acknowledgement. TRAP has highest priority and RST 7.5 has second highest priority and so on.
