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Chapter 2. Instruction Set Principles
and Examples
- Topics
- Present a taxonomy of instruction set alternatives
- Analyze some instruction set measurements
- Discuss instruction set architecture not aim at
desktops or servers: DSPs and Media processors
- Address the issue of languages and compilers
- Overview the MIPS
Classification of Instruction Set
Architectures
- The type of internal storage in the CPU is the
most basic differentiation.
- The major choices are a stack, an accumulator, or
a set of registers. Operands may be explicit or
implicit.
- Stack architecture : Early machines
- Accumulator architecture : Early machines
- General purpose register (GPR) architecture : machines after 1980.
Code Sequence for C=A+B
Stack Accumulator Register-memory Register-register
Push A Load A Load R1, A Load R1, A Push B Add B Add R1, B Load R2, B Add Store C Store C Add R3, R1, R Pop C Store C, R
Memory Access for GPR Machines
- Two ways to access explicit operands
- First loaded into temporary storage
- Accessed directly from memory
- Memory access for register machine
- Register-memory architecture: one can access memory as part of any instruction.
- Register-register or load-store architecture: memory access only by load or store instructions.
- Memory access for memory-memory architecture
- Reasons for emergence of general-purpose register (GPR) machines
- Registers are faster than memory
- Registers are easily used by a compiler and used more effectively.
- Example: (AB)-(CD)-(E*F) for stack machine? for GPR machine?
- Registers can be used to hold variables: Reduce memory traffic, improve code density, speed up program.
Advantages & Disadvantages of GPR
Machines
Type Advantages
Disadvantages
Register Simple, fixed inst. length, Poor code density
(3,0) similar clocks to execute
Register Easy to encode, Operands destroyed,
(1,2) good code density CPI varies
Memory-Memory Most compact Inst. Length and CPI
(2,2) or (3,3) varies greatly
Memory Addressing
- How is a memory address interpreted?
- Byte addressed: Provide access for bytes, half words, words, and double words (64 bits)
- Conventions for ordering the bytes within a word:
- Little Endian: put byte whose address xxxx00 at LSB position. Word address Data 0 3 2 1 0 4 7 6 5 4
- Big Endian: Put byte whose address xxxx00 at MSB position. Word address Data 0 0 1 2 3 4 4 5 6 7
Addressing Mode
- How architectures specify the address of an object they will access? - In a GPR, an addressing mode can specify - a constant, - a register, - a location in memory (used to compute effective address). - Immediate or literals are usually considered as memory addressing mode. - Addressing modes that depend on the program counter is called PC-relative addressing. - Addressing modes can significantly reduce instruction counts, but may add to the complexity of building a machine and increase the average CPI.
Addressing Modes for Desktops and
Servers
Register ADD R4, R
Immediate ADD R4, #
Displacement ADD R4, 100(R1)
Register Indirect ADD R4, (R1)
Indexed ADD R3, (R1+R2)
Direct (Absolute) ADD R1, (1001)
Memory Indirect ADD R1, @(R3)
Autoincrement ADD R1, (R2)+
Autodecrement ADD R1, -(R2)
Scaled ADD R1, 100(R2)[R3]
Displacement Addressing Mode
(Alpha, SPEC CPU2000)
Immediate or Literal Addressing Mode
Addressing Mode for DSPs
- 95% of DSP addressings are same as the
Addressing modes for desktops and servers
- Circular (modulo) addressing mode
- Starting address register and ending address register
- Bit-reverse addressing mode
- Reverse the bit order in an address register
- 6(1100) 3(0011)
- Used for Fast Fourier Transform(FFT)
- Bit-reverse and circular takes only 5% of DSP
addressings
Type and Size of Operands
• How is the type of an operand designated?
- Encoding it in the OpCode
- Annotated with tags
• For desktops(servers) and DSPs
Operands for Media and Signal
Processing
• Vertex for graphic operations
- A vertex has four components
- X-coordinate, Y-coordinate, Z-coordinate, and W- coordinate (to help with color or hidden surface)
• Pixel for imaging Processing
- A pixel typically has 32 bits which is divided into
four 8-bit channels.
- R(red), G(green), B(blue), and A (denote the transparency of the surface or the pixel)
• Fixed-point operand type (in addition to
floating point)
• Data widths
Operations in the Instruction Set
• Desktops and servers
- ALU, Data transfer, control, system, floating point,
decimal, string, graphics.
- SIMD instructions for medial and signal processing
(fig. 2.17)
- Ten most used 80x86instructions (takes 96% of
the total inst.)
- Load(22%), conditional branch(20%), compare(16%), store(12%), …. (fig. 2.16)
• DSPs (beside the above operations in desktops)
- MAC (multiply and accumulate)
- Saturating arithmetic Docsity.com
